Micron invests in Japan's AI memory chips
Micron Technology plans to build a new plant for High Bandwidth Memory (HBM) chips in Hiroshima, investing around 1.5 trillion yen, or about 9.6 billion US dollars. The goal is to meet the growing memory demand of modern AI systems. This investment is a clear signal of the bottleneck in the AI stack shifting from computing power to memory bandwidth.
Source: Own Visualization
Micron's Investment in Japan
Micron Technology plans to build a new memory chip factory in Hiroshima. The investment amounts to approximately 1.5 trillion yen, which is about 9.6 billion US dollars. The plant will produce High Bandwidth Memory (HBM) chips for AI applications and data centers. These chips are specifically designed for accelerators like GPUs, which execute large language models and other computationally intensive AI workloads ( Reuters).
Construction is planned to begin on an existing Micron site in Hiroshima in May of next year. The first chip shipments are expected around 2028 ( Reuters). ). Japan's Ministry of Economy, Trade and Industry (METI) supports the project with up to 500 billion yen. This is part of a series of large-scale subsidies for advanced semiconductor plants ( Reuters).
In September 2025, METI announced that it would support Micron with up to 536 billion yen for its DRAM plant in Hiroshima, focusing on High Bandwidth Memory and EUV lithography ( TrendForce). ). This funding supplements earlier grants of 46.5 billion yen from 2022 for the expansion of DRAM production in Hiroshima ( Reuters). ). Hiroshima is thus developing into a central hub for DRAM and HBM production in Japan, with mass production of 1-gamma DRAM planned from 2027 and a clear focus on High Bandwidth Memory as a growth segment ( TrendForce).
Source: finanznachrichten.de
Micron Technology is investing heavily in expanding its production capacity for AI memory chips.
Importance of HBM for AI
High Bandwidth Memory (HBM) is a special type of DRAM. It involves vertically stacking multiple memory chips and connecting them to a GPU or CPU via Through-Silicon Vias (TSVs) with an extremely wide interface ( Wikipedia). ). This 3D stack delivers significantly more bandwidth than traditional DDR or GDDR memory in a much smaller area, with similar power consumption ( Wikipedia).
Current HBM generations show rapid development: HBM3 achieves over 800 GB/s per stack, and HBM3E up to around 1.2 TB/s by increasing clock speeds and stack heights ( Wikipedia; Micron). ). The new HBM4 standard from JEDEC enables bandwidths of up to about 2 TB/s per stack and capacities of up to 64 GB per stack ( All About Circuits).
Nvidia's H200 GPU combines 141 GB of HBM3E with a memory bandwidth of 4.8 TB/s, roughly doubling the capacity compared to the H100 generation ( NVIDIA). ). Micron supplies 24 GB HBM3E stacks for this platform and is developing 36 GB 12-high stacks for larger models and upcoming GPUs ( Micron; Micron). ). A 36 GB HBM3E stack allows a model like LLaMA 2 with 70 billion parameters to run on a single processor without constant loading back and forth between GPU and CPU ( Micron).
Analysis shows that all leading AI GPUs now rely entirely on HBM, and future generations are aiming for even higher stack heights and bandwidths ( SemiAnalysis). ). The computing power of AI hardware is growing faster than the available memory bandwidth, making HBM the dominant bottleneck, especially for large language models with many context tokens and key-value caches ( Semiconductor Engineering; arXiv). ). For developers, this means that even with additional GPUs, the available HBM capacity and bandwidth often limit how large a model, batch, or context window can be ( Semiconductor Engineering).
Source: retail-news.de
High Bandwidth Memory (HBM) is crucial for the performance of modern AI applications.
Source: YouTube
Source: YouTube
Japan's Semiconductor Strategy
For several years, Japan has been pursuing an explicit "Semiconductor and Digital Strategy" that defines semiconductors, digital infrastructure, software, and cloud as strategic foundational technologies ( meti.go.jp; cicc.or.jp). ). The strategy emphasizes the role of chips for 5G, artificial intelligence, IoT, and autonomous systems, directly linking technological sovereignty to national security ( Access Partnership).
In January 2025, Japan allocated around 1.05 trillion yen from its budget for research into next-gen chips and quantum computing. An additional approximately 471 billion yen was reserved for promoting domestic chip production ( The Quantum Insider). ). These sums complement ongoing programs to attract or expand TSMC, Rapidus, and international memory manufacturers in Japan ( amro-asia.org).
Micron is a key player in this strategy. In addition to the new 1.5 trillion yen project, the company is receiving up to 536 billion yen in direct subsidies for expanding its Hiroshima manufacturing with a focus on HBM and 1-gamma DRAM ( TrendForce; semicone.com). ). In 2022, METI already supported Micron with 46.5 billion yen for the expansion of an existing DRAM line, also citing supply security and geopolitical risks ( Reuters).
Analyses, such as those from the Alan Turing Institute, show that Japan is deliberately bringing leading manufacturing back into the country while simultaneously expanding its role in materials, equipment, and packaging within the global supply chain ( cetas.turing.ac.uk). ). The new plant for AI memory chips fits into this picture: it strengthens Japan's own position in critical components and reduces dependence on individual locations like Taiwan ( Reuters).
Global HBM Competition
HBM memory has become a central arena in the AI hardware market, according to analyses by the "Financial Times" ( Financial Times). ). The market is currently dominated by three main manufacturers: SK hynix, Samsung, and Micron. They compete for design wins with Nvidia, AMD, and other major accelerator providers ( Financial Times).
SK hynix has secured a strong position as a supplier to Nvidia with early HBM generations and specialized packaging techniques ( Financial Times). ). Samsung is catching up with certified HBM3E stacks for Nvidia platforms, after primarily supplying AMD's Instinct cards initially ( Tom's Hardware). ). Micron, in turn, reports that it is already delivering samples of its HBM4 chips with bandwidths of up to 2.8 TB/s per stack, exceeding the official HBM4 specifications ( TechRadar).
In parallel, JEDEC officially released the HBM4 standard in spring 2025, which envisages bandwidths of up to approximately 2 TB/s per stack and capacities of up to 64 GB per HBM tower ( EDN; All About Circuits). ). Nvidia is reportedly pushing its suppliers to go beyond these specifications and deliver HBM4 stacks with around 10 Gbps per pin, in order to further differentiate future GPUs like the Rubin platform from AMD's MI450 generation ( Tom's Hardware).
The global supply chain for AI memory chips is closely intertwined between GPU manufacturers, HBM providers, and government industrial policy. Analyses by AMRO and other institutions emphasize that Japan, the US, South Korea, Taiwan, and the EU are investing heavily in semiconductor ecosystems to avoid dependence on individual countries or companies in the age of AI ( amro-asia.org; Financial Times).
). This specifically means for HBM supply chains that locations like Hiroshima, SK hynix's Korean manufacturing facilities, Samsung plants, and potentially other HBM capacities – for example, in the US or Europe – form a network that is constantly recalibrated through export controls, subsidies, and technological standards ( Financial Times; cetas.turing.ac.uk).
Source: aktienmagazin.de
Micron memory chips are an integral part of high-performance AI infrastructure like the AMD Instinct MI350.
Impact for Companies & Developers
For operators of data centers, cloud platforms, and AI startups, HBM is a tangible cost and capacity factor. An H200 node with 8 GPUs, each with 141 GB of HBM3E, can provide more than a terabyte of extremely fast GPU memory. This is ideal for very large language models or long contexts, but also extremely expensive to acquire ( NVIDIA; Supermicro).
Reports from hardware vendors and analyses from cloud platforms show that many AI workloads today are clearly memory-bound. More HBM bandwidth often brings significantly more throughput than additional TFLOPS of computing power ( intelmarketresearch.com; openmetal.io). ). ArXiv studies on LLM inference confirm that especially the decoding phase is limited by memory bandwidth and access patterns, not by raw computing power ( arXiv; arXiv).
Micron's investment in AI memory chips in Japan primarily means two things for companies: Firstly, from around 2028, the chances increase that more HBM capacity will be available on the market and the tight supply situation will ease somewhat, especially if Micron builds up HBM4 and HBM4E capacities in parallel ( Reuters; TechRadar). ). Secondly, the pressure on competitors to also invest heavily in HBM manufacturing and packaging increases, which suggests more supply diversity and innovation in the medium to long term ( Financial Times).
For developers and architects of AI systems, the consequence is pragmatic: it is worth treating HBM as its own planning parameter – similar to the number of parameters or FLOPS – and aligning roadmaps for their own models with the foreseeable memory development ( Semiconductor Engineering; Lam Research Newsroom). ). Those making infrastructure decisions today should consider that future GPU generations with HBM4 and beyond will not only offer more bandwidth but also larger, more flexible memory stacks, often with close coupling to packaging technologies such as CoWoS or 2.5D/3D integration ( Lam Research Newsroom; Lam Research Newsroom).
Conclusion
Micron's new billion-dollar plant for HBM memory in Hiroshima is a clear signal that the bottleneck in the AI stack is shifting from computing power to memory bandwidth. The combination of massive state funding from Japan, aggressive product plans for HBM3E and HBM4, and the growing demand from large AI models makes it clear: those who want to understand the future of AI must keep an eye on the dynamics in the High Bandwidth Memory market and the global supply chain behind it ( Reuters; Financial Times).
). For teams working on AI products today, it remains a core task until at least the end of the decade to consciously manage memory consumption and bandwidth – and at the same time, to carefully observe how quickly new HBM capacities like the Micron plant in Hiroshima actually go online ( Semiconductor Engineering; amro-asia.org).